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Hardware backdoors in some x86 CPUs

ID
12264
Status
summarized
Published
08 Aug 2026, 3:04 PM
Fetched
10 Aug 2026, 4:50 AM
Provider
Hacker News
Category
dev-community
Original URL
https://github.com/xoreaxeaxeax/rosenbridge
Source URL
https://hnrss.org/best

Summary

Score
3.5
Created
10 Aug 2026, 4:52 AM
Tags
Audience
developersvibe_coders

What happened

The 'rosenbridge' project documents a hardware backdoor in VIA C3 x86 CPUs that allows userland (ring 3) code to bypass memory protections and directly modify kernel (ring 0) data. The backdoor involves a deeply embedded non-x86 core within the CPU, which is enabled by default on some systems. The repository provides tools to check for and close the backdoor, though the issue is limited to older C3 processors and does not affect later generations.

Why it matters

If you operate or build on embedded systems, ATMs, POS, or industrial hardware using VIA C3 CPUs, you should use the provided tools to check if the backdoor is enabled and disable it. For everyone else on modern hardware, this is a historical case study with no required action.

Discussion angle

The implications of hardware-level backdoors for legacy industrial and embedded systems, and how to audit them.

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