Waymo has designed a robocar chip to stay ahead of Tesla
- ID
- 16236
- Status
- summarized
- Published
- 21 Aug 2026, 3:41 AM
- Fetched
- 21 Aug 2026, 5:01 AM
- Provider
- The Register
- Category
- technology
- Original URL
- https://www.theregister.com/edge-and-iot/2026/08/20/waymo-has-designed-a-robocar-chip-to-stay-ahead-of-tesla/5290592
- Source URL
- https://www.theregister.com/headlines.atom
Summary
- Score
- 3.5
- Created
- 21 Aug 2026, 5:02 AM
- Tags
- Audience
- ai_ml_learnersdevelopers
What happened
Waymo has begun deploying its first custom AI ASIC, built on TSMC's 5nm process, to replace the Intel FPGAs it previously used for sensor processing in autonomous vehicles. The chip claims 1,000+ TOPS (likely INT8) and is optimized for both CNNs and transformer models, incorporating data from over 200 million miles of autonomous driving, with heavy focus on latency and redundancy for automotive environments.
Why it matters
This is a niche hardware story for AV/robotics specialists; most builders in the audience won't change tooling or architecture decisions because of it. The only broadly useful signal is the FPGA-to-ASIC migration pattern: when latency and compute density become critical enough, general-purpose programmable hardware gives way to fixed-function silicon—a tradeoff worth noting if you ever build real-time edge ML systems.
Discussion angle
The FPGA-to-ASIC transition is a classic build-vs-buy inflection: at what scale and latency requirement does rolling your own silicon beat off-the-shelf accelerators, and is that ever relevant to Southeast Asian startups building edge ML products?