Hot Chips 2026: Samsung reveals a three-phase HBM roadmap that puts logic and compute inside memory — zHBM ultimately stacks DRAM directly on top of the processor
- ID
- 20212
- Status
- summarized
- Published
- 01 Sep 2026, 7:06 PM
- Fetched
- 01 Sep 2026, 8:41 PM
- Provider
- Tom's Hardware
- Category
- technology
- Original URL
- https://www.tomshardware.com/tech-industry/semiconductors/hot-chips-2026-samsung-reveals-a-three-phase-hbm-roadmap-that-puts-logic-and-compute-inside-memory-zhbm-ultimately-stacks-dram-directly-on-top-of-the-processor
- Source URL
- https://www.tomshardware.com/feeds/all
Summary
- Score
- 4.5
- Created
- 01 Sep 2026, 9:55 PM
- Tags
- Audience
- developersai_ml_learnerssaas_founders
What happened
At Hot Chips 2026, Samsung's Sangwook Han detailed a three-phase HBM roadmap culminating in zHBM, which stacks DRAM directly on top of the processor and eliminates the conventional 2.5D interposer. The evolution starts with HBM4, where Samsung moved the base die from a DRAM process node to a 4nm logic process to cut power and die area, creating a more capable piece of silicon that can eventually host compute logic.
Why it matters
This is a multi-year roadmap, not something to act on now, but it signals that memory bandwidth — the primary bottleneck for large model inference — may eventually be solved by collapsing the memory-processor distance entirely. Builders planning GPU infrastructure or AI workloads over a 3-5 year horizon should note that HBM4's logic-process base die is already shipping-relevant and zHBM could reshape accelerator pricing and availability.
Discussion angle
What does collapsing memory and compute into one die mean for the economics of running AI inference — does it favor hyperscalers even more, or could it lower costs for smaller builders?