TSMC, Samsung, and Intel shore up support with ASML to deploy larger High-NA EUV photomasks — 6×12-inch photomask transition may take years despite unified effort
- ID
- 23161
- Status
- summarized
- Published
- 10 Sep 2026, 7:20 PM
- Fetched
- 10 Sep 2026, 9:12 PM
- Provider
- Tom's Hardware
- Category
- technology
- Original URL
- https://www.tomshardware.com/tech-industry/semiconductors/tsmc-samsung-and-intel-shore-up-support-with-asml-to-deploy-larger-high-na-euv-photomasks-6-12-inch-photomask-transition-may-take-years-despite-unified-effort
- Source URL
- https://www.tomshardware.com/feeds/all
Summary
- Score
- 3.0
- Created
- 10 Sep 2026, 9:14 PM
- Tags
- Audience
- developersai_ml_learnerssaas_founders
What happened
TSMC, Samsung, Intel, and ASML are collaborating to transition to 6×12-inch photomasks (reticles) required for High-NA EUV lithography, which would allow printing large chips in a single pass instead of stitching smaller designs together. The transition is expected to take years despite the unified effort, echoing past industry-wide collaborations like the EUV rollout and the abandoned 450mm wafer push.
Why it matters
This is a multi-year semiconductor manufacturing infrastructure story with no immediate action item for software builders. The practical signal is that High-NA EUV enabling larger single-pass chips is still years away, so any roadmap assumptions about dramatically larger or cheaper monolithic dies in the near term should be tempered. Founders relying on next-gen silicon for cost or capability leaps should not plan around this arriving soon.
Discussion angle
What the multi-year timeline for High-NA EUV and larger reticles means for AI hardware availability — if the lithography transition slips, does that extend the window where software-level optimization and model efficiency matter more than raw silicon scaling?