AI and Tech Summaries - AI Weekly Malaysia

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Short AI and tech summaries with source links, signal scores, and why each update matters for builders, founders, and Malaysian tech workers.

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Date	Provider	Score	Summary
06 Nov 2026, 10:00 PM	Tom's Hardware	3.0	GlobalFoundries VP details FDX Fusion technology, sporting 7nm-class performance without the need for EUV tools — company targets 2030 for high-volume manufacturing, with planar transistors in tow GlobalFoundries VP Sudipto Bose, who leads the company's FD-SOI business unit, detailed FDX Fusion: a FD-SOI process claiming 7nm-class performance with advanced planar transistors and no EUV lithography, at 8nm-class logic density. Commercial production is targeted for 2028, with high-volume manufacturing aimed at 2030 — eight years after GlobalFoundries dropped its original 7nm FinFET effort. The trade-off stated in the piece is low transistor density relative to true 7nm nodes. Why: Nothing here changes a build decision today: the first commercial output is slated for 2028 and volume for 2030, and the process trades density (8nm-class) for avoiding EUV. The only actionable read for a Malaysian hardware-adjacent team is cost structure — non-EUV FD-SOI is aimed at cheaper die cost, so if you are scoping edge/IoT or RF silicon for a 2029-2030 product cycle, this is a candidate to price against, not a reason to delay anything shipping sooner. semiconductors fd-soi globalfoundries hardware-roadmap

Date

Provider

Score

Summary

06 Nov 2026, 10:00 PM

Tom's Hardware

3.0

GlobalFoundries VP details FDX Fusion technology, sporting 7nm-class performance without the need for EUV tools — company targets 2030 for high-volume manufacturing, with planar transistors in tow

GlobalFoundries VP Sudipto Bose, who leads the company's FD-SOI business unit, detailed FDX Fusion: a FD-SOI process claiming 7nm-class performance with advanced planar transistors and no EUV lithography, at 8nm-class logic density. Commercial production is targeted for 2028, with high-volume manufacturing aimed at 2030 — eight years after GlobalFoundries dropped its original 7nm FinFET effort. The trade-off stated in the piece is low transistor density relative to true 7nm nodes.

Why: Nothing here changes a build decision today: the first commercial output is slated for 2028 and volume for 2030, and the process trades density (8nm-class) for avoiding EUV. The only actionable read for a Malaysian hardware-adjacent team is cost structure — non-EUV FD-SOI is aimed at cheaper die cost, so if you are scoping edge/IoT or RF silicon for a 2029-2030 product cycle, this is a candidate to price against, not a reason to delay anything shipping sooner.